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| JMF602 JMF602 SATA II to Flash Controller Overview JMF602 is a single chip with Serial ATA Gen II and USB 2.0 combo to NAND flash interface. It is an innovative design to provide high bandwidth for flash memory access. JMF602 can support the maximum read and write speed to drive the limit of flash memory. It supports up to 256 NAND Flash chips. JMF602 is available in 211 pin TFBGA (12mm x 12 mm) package. JMF602 supports a variety of popular NAND flash memory, including Toshiba, Samung, Hynix/ST and Intel/Micron Flash. With the embedded hardware error correction engines and the robust bad block management technology, JMF602 is suitable for PC and industrial solid state drive applications. In addition, dynamic and whole drive static wear leveling are used in JMF602 to provide the best extension of drive life time. JMicron also provides reference designs in different drive form factors, mass production tool and firmware update tool to help customers go on mass product quickly. Feature Compliance * Compliant with Universal Serial Bus Specification Revision 2.0 * Compliant with USB Mass Storage Class specification version 1.0 * Compliant with Serial ATA International Organization : Serial ATA Revision 2.6 USB 2.0 www..com * USB Bulk mode transport protocol SATA II * Supports 1-port 3.0Gbps SATA II interface FLASH * Supports up to 256 CEs. * 170/135 MB/s Sequential read/write rates (SLC) * Enhanced endurance by Dynamic/Static wear-leveling * Supports BCH ECC to correct 8/15 bit errors in 512 bytes * Support both 2K and 4K byte page size flash * Supports dynamic power management * Support SMART function * Data integrity under power-cycling * Supports USB/SATA firmware upgrade Copyright (c) 2006 JMicron Technology Corp. All rights reserved. Product Brief Reversion 0.1 Page 1 NDA Required 2008/06/01 JMF602 SYSTEM * Integrated 1-port USB2.0, 1-port SATA II and 8-channel Flash controller * LED indicator for USB2.0 or SATA read/write access * LED indicator for USB2.0 or SATA PHY link up * Provides 9 GPIO pins for customer * Provides UART and JTAG for S/W debugging * Available in 208-pin LQFP(28 mm * 28 mm) package * Built-in power-up self-test (BIT) * Manual and automatic self-diagnostics Functional Block Diagram JMF602 Flash Controller 1 & ECC engine SATA Controller SATA II PHY SATA II I/F NDA Required 2008/06/01 Flash I/F Bus Flash I/F www..com Flash Controller 8 & ECC engine USB 2.0 Controller USB 2.0 PHY GPIO Chip Configuration CPU GPIO Chip Config. Functional Block Diagram of JMF602 Copyright (c) 2006 JMicron Technology Corp. All rights reserved. Product Brief Reversion 0.1 Page 2 USB I/F XTALI JMF602 Total capacity density/per flash 128M x 8 Bits (1Gb) 256M x 8 Bits (2Gb) 512M x 8 Bits (4Gb) 1G x 8 Bits (8Gb) 1G x 8 Bits (8Gb) 2G x 8 Bits (16Gb) 4G x 8 Bits (32Gb) Product Information Name JMF602 Description SATA II to Flash Controller Support CE pins/per flash 1 CE pin 1 CE pin 1 CE pin 2 CE pins 1 CE pin 2 CE pins 4 CE pins maximum flash number 256 256 256 128 256 128 64 Total capacity 32G Bytes 64G Bytes 128G Bytes 128G Bytes 256G Bytes 256G Bytes 256G Bytes Document 1 JMF602 Data Sheet 2 JMF602 Design Specification 3 JMF602 Hardware Design Guide 4 JMF602 Hardware Schematic Contact Information Department Sales Tech. Support Email sales@jmicron.com fae@jmicron.com www..com Copyright (c) 2006 JMicron Technology Corp. All rights reserved. Product Brief Reversion 0.1 Page 3 NDA Required 2008/06/01 |
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